C51 Instruction Set

Instruction type selects:    ALL Arithmetic Boolean Branching Data Trans Logical



A5
165
1
1
NOP2 (none)
39
NOP No operation
11
17
2
4
ACALL addr11
11
Branching Absolute subroutine call
31
49
2
4
ACALL addr11
11
Branching Absolute subroutine call
51
81
2
4
ACALL addr11
11
Branching Absolute subroutine call
71
113
2
4
ACALL addr11
11
Branching Absolute subroutine call
91
145
2
4
ACALL addr11
11
Branching Absolute subroutine call
B1
177
2
4
ACALL addr11
11
Branching Absolute subroutine call
D1
209
2
4
ACALL addr11
11
Branching Absolute subroutine call
F1
241
2
4
ACALL addr11
11
Branching Absolute subroutine call
24
36
2
2
ADD A, #data
12
Arithmetic Add immediate to A
25
37
2
2
ADD A, direct
12
Arithmetic Add direct byte to A
26
38
1
2
ADD A, @R0
12
Arithmetic Add indirect RAM to A
27
39
1
2
ADD A, @R1
12
Arithmetic Add indirect RAM to A
28
40
1
1
ADD A, R0
12
Arithmetic Add register to A
29
41
1
1
ADD A, R1
12
Arithmetic Add register to A
2A
42
1
1
ADD A, R2
12
Arithmetic Add register to A
2B
43
1
1
ADD A, R3
12
Arithmetic Add register to A
2C
44
1
1
ADD A, R4
12
Arithmetic Add register to A
2D
45
1
1
ADD A, R5
12
Arithmetic Add register to A
2E
46
1
1
ADD A, R6
12
Arithmetic Add register to A
2F
47
1
1
ADD A, R7
12
Arithmetic Add register to A
34
52
2
2
ADDC A, #data
13
Arithmetic Add immediate to A with carry ( A = A + byte + C)
35
53
2
2
ADDC A, direct
13
Arithmetic Add direct byte to A with carry ( A = A + byte + C)
36
54
1
2
ADDC A, @R0
13
Arithmetic Add indirect RAM to A with carry ( A = A + byte + C)
37
55
1
2
ADDC A, @R1
13
Arithmetic Add indirect RAM to A with carry ( A = A + byte + C)
38
56
1
1
ADDC A, R0
13
Arithmetic Add register to A with carry ( A = A + byte + C)
39
57
1
1
ADDC A, R1
13
Arithmetic Add register to A with carry ( A = A + byte + C)
3A
58
1
1
ADDC A, R2
13
Arithmetic Add register to A with carry ( A = A + byte + C)
3B
59
1
1
ADDC A, R3
13
Arithmetic Add register to A with carry ( A = A + byte + C)
3C
60
1
1
ADDC A, R4
13
Arithmetic Add register to A with carry ( A = A + byte + C)
3D
61
1
1
ADDC A, R5
13
Arithmetic Add register to A with carry ( A = A + byte + C)
3E
62
1
1
ADDC A, R6
13
Arithmetic Add register to A with carry ( A = A + byte + C)
3F
63
1
1
ADDC A, R7
13
Arithmetic Add register to A with carry ( A = A + byte + C)
01
1
2
4
AJMP addr11
14
Branching Absolute jump
21
33
2
4
AJMP addr11
14
Branching Absolute jump
41
65
2
4
AJMP addr11
14
Branching Absolute jump
61
97
2
4
AJMP addr11
14
Branching Absolute jump
81
129
2
4
AJMP addr11
14
Branching Absolute jump
A1
161
2
4
AJMP addr11
14
Branching Absolute jump
C1
193
2
4
AJMP addr11
14
Branching Absolute jump
E1
225
2
4
AJMP addr11
14
Branching Absolute jump
52
82
2
2
ANL direct, A
15
Logical AND A to direct byte
53
83
3
3
ANL direct, #data
15
Logical AND immediate to direct byte
54
84
2
2
ANL A, #data
15
Logical AND immediate to A
55
85
2
2
ANL A, direct
15
Logical AND direct byte to A
56
86
1
2
ANL A, @R0
15
Logical AND indirect RAM to A
57
87
1
2
ANL A, @R1
15
Logical AND indirect RAM to A
58
88
1
1
ANL A, R0
14
Logical AND Register to A
59
89
1
1
ANL A, R1
14
Logical AND Register to A
82
130
2
2
ANL C, bit addr
16
Logical AND direct bit to Carry (C = C && bit)
5A
90
1
1
ANL A, R2
14
Logical AND Register to A
5B
91
1
1
ANL A, R3
14
Logical AND Register to A
5C
92
1
1
ANL A, R4
14
Logical AND Register to A
5D
93
1
1
ANL A, R5
14
Logical AND Register to A
5E
94
1
1
ANL A, R6
14
Logical AND Register to A
5F
95
1
1
ANL A, R7
14
Logical AND Register to A
B0
176
2
2
ANL C, /bit addr
16
Logical AND complement of direct bit to Carry ((C = C && !bit)
B4
180
3
3/5
CJNE A, #data, rel addr
18
Branching Compare immediate to A and jump if not equal
B5
181
3
3/5
CJNE A, direct, rel addr
17
Branching Compare direct byte to A and jump if not equal
B6
182
3
4/6
CJNE @R0, #data, rel addr
18
Branching Compare immediate to indirect and jump if not equal
B7
183
3
4/6
CJNE @R1, #data, rel addr
18
Branching Compare immediate to indirect and jump if not equal
B8
184
3
3/5
CJNE R0, #data, rel addr
18
Branching Compare immediate to Register and jump if not equal
B9
185
3
3/5
CJNE R1, #data, rel addr
18
Branching Compare immediate to Register and jump if not equal
BA
186
3
3/5
CJNE R2, #data, rel addr
18
Branching Compare immediate to Register and jump if not equal
BB
187
3
3/5
CJNE R3, #data, rel addr
18
Branching Compare immediate to Register and jump if not equal
BC
188
3
3/5
CJNE R4, #data, rel addr
18
Branching Compare immediate to Register and jump if not equal
BD
189
3
3/5
CJNE R5, #data, rel addr
18
Branching Compare immediate to Register and jump if not equal
BE
190
3
3/5
CJNE R6, #data, rel addr
18
Branching Compare immediate to Register and jump if not equal
BF
191
3
3/5
CJNE R7, #data, rel addr
18
Branching Compare immediate to Register and jump if not equal
C2
194
2
2
CLR bit addr
19
Logical Clear direct bit
C3
195
1
1
CLR C
19
Boolean Clear Carry
E4
228
1
1
CLR A
19
Logical Clear A
B2
178
2
2
CPL bit addr
20
Logical Complement direct bit (toggle each bit within bit)
B3
179
1
1
CPL C
20
Boolean Complement Carry (toggle C)
F4
244
1
1
CPL A
20
Logical Complement A (toggle each bit in A)
D4
212
1
1
DA A
21
Arithmetic Decimal adjust A. Use after math operation on two 8 bit BCD values.
14
20
1
1
DEC A
22
Arithmetic Decrement A
15
21
2
2
DEC direct
22
Arithmetic Decrement direct byte
16
22
1
2
DEC @R0
22
Arithmetic Decrement indirect RAM
17
23
1
2
DEC @R1
22
Arithmetic Decrement indirect RAM
18
24
1
1
DEC R0
22
Arithmetic Decrement register
19
25
1
1
DEC R1
22
Arithmetic Decrement register
1A
26
1
1
DEC R2
22
Arithmetic Decrement register
1B
27
1
1
DEC R3
22
Arithmetic Decrement register
1C
28
1
1
DEC R4
22
Arithmetic Decrement register
1D
29
1
1
DEC R5
22
Arithmetic Decrement register
1E
30
1
1
DEC R6
22
Arithmetic Decrement register
1F
31
1
1
DEC R7
22
Arithmetic Decrement register
84
132
1
8
DIV AB
23
Arithmetic Divide A by B. A = (int) A/B, B = remainder of A/B
D5
213
3
3/5
DJNZ direct, rel addr
24
Branching Decrement direct byte and jump if not zero
D8
216
2
2/4
DJNZ R0, rel addr
24
Branching Decrement Register and jump if not zero
D9
217
2
2/4
DJNZ R1, rel addr
24
Branching Decrement Register and jump if not zero
DA
218
2
2/4
DJNZ R2, rel addr
24
Branching Decrement Register and jump if not zero
DB
219
2
2/4
DJNZ R3, rel addr
24
Branching Decrement Register and jump if not zero
DC
220
2
2/4
DJNZ R4, rel addr
24
Branching Decrement Register and jump if not zero
DD
221
2
2/4
DJNZ R5, rel addr
24
Branching Decrement Register and jump if not zero
DE
222
2
2/4
DJNZ R6, rel addr
24
Branching Decrement Register and jump if not zero
DF
223
2
2/4
DJNZ R7, rel addr
24
Branching Decrement Register and jump if not zero
04
4
1
1
INC A
25
Arithmetic Increment A
05
5
2
2
INC direct
25
Arithmetic Increment direct byte
06
6
1
2
INC @R0
25
Arithmetic Increment indirect RAM
07
7
1
2
INC @R1
25
Arithmetic Increment indirect RAM
08
8
1
1
INC R0
25
Arithmetic Increment register
09
9
1
1
INC R1
25
Arithmetic Increment register
0A
10
1
1
INC R2
25
Arithmetic Increment register
0B
11
1
1
INC R3
25
Arithmetic Increment register
0C
12
1
1
INC R4
25
Arithmetic Increment register
0D
13
1
1
INC R5
25
Arithmetic Increment register
0E
14
1
1
INC R6
25
Arithmetic Increment register
0F
15
1
1
INC R7
25
Arithmetic Increment register
A3
163
1
1
INC DPTR
26
Arithmetic Increment Data Pointer
20
32
3
3/5
JB bit addr, rel addr
26
Branching Jump if direct bit is set
10
16
3
3/5
JBC bit addr, rel addr
27
Branching Jump if direct bit is set and clear bit
40
64
2
2/4
JC rel addr
27
Branching Jump if Carry is set
73
115
1
4
JMP @A+DPTR
28
Branching Jump to A + DPTR
30
48
3
3/5
JNB bit addr, rel addr
29
Branching Jump if direct bit is not set
50
80
2
2/4
JNC rel addr
29
Branching Jump if Carry is not set
70
112
2
2/4
JNZ rel addr
30
Branching Jump if A does not equal zero
60
96
2
2/4
JZ rel addr
30
Branching Jump if A equals zero
12
18
3
5
LCALL addr16
31
Branching Long subroutine call
02
2
3
5
LJMP addr16
31
Branching Long jump
74
116
2
2
MOV A, #data
33
Data Trans Move immediate to A
75
117
3
3
MOV direct, #data
34
Data Trans Move immediate to direct byte
76
118
2
2
MOV @R0, #data
34
Data Trans Move immediate to indirect RAM
77
119
2
2
MOV @R1, #data
34
Data Trans Move immediate to indirect RAM
78
120
2
2
MOV R0, #data
33
Data Trans Move immediate to Register
79
121
2
2
MOV R1, #data
33
Data Trans Move immediate to Register
85
133
3
3
MOV direct, direct
34
Data Trans Move direct byte to direct byte
86
134
2
2
MOV direct, @R0
32
Data Trans Move indirect RAM to direct byte
87
135
2
2
MOV direct, @R1
32
Data Trans Move indirect RAM to direct byte
88
136
2
2
MOV direct, R0
33
Data Trans Move Register to direct byte
89
137
2
2
MOV direct, R1
33
Data Trans Move Register to direct byte
90
144
3
3
MOV DPTR, #data16
35
Data Trans Load DPTR with 16-bit constant
92
146
2
2
MOV bit addr, C
35
Data Trans Move Carry to direct bit
7A
122
2
2
MOV R2, #data
33
Data Trans Move immediate to Register
7B
123
2
2
MOV R3, #data
33
Data Trans Move immediate to Register
7C
124
2
2
MOV R4, #data
33
Data Trans Move immediate to Register
7D
125
2
2
MOV R5, #data
33
Data Trans Move immediate to Register
7E
126
2
2
MOV R6, #data
33
Data Trans Move immediate to Register
7F
127
2
2
MOV R7, #data
33
Data Trans Move immediate to Register
8A
138
2
2
MOV direct, R2
33
Data Trans Move Register to direct byte
8B
139
2
2
MOV direct, R3
33
Data Trans Move Register to direct byte
8C
140
2
2
MOV direct, R4
33
Data Trans Move Register to direct byte
8D
141
2
2
MOV direct, R5
33
Data Trans Move Register to direct byte
8E
142
2
2
MOV direct, R6
33
Data Trans Move Register to direct byte
8F
143
2
2
MOV direct, R7
33
Data Trans Move Register to direct byte
A2
162
2
2
MOV C, bit addr
35
Data Trans Move direct bit to Carry
A6
166
2
2
MOV @R0, direct
32
Data Trans Move direct byte to indirect RAM
A7
167
2
2
MOV @R1, direct
32
Data Trans Move direct byte to indirect RAM
A8
168
2
2
MOV R0, direct
32
Data Trans Move direct byte to Register
A9
169
2
2
MOV R1, direct
32
Data Trans Move direct byte to Register
AA
170
2
2
MOV R2, direct
32
Data Trans Move direct byte to Register
AB
171
2
2
MOV R3, direct
32
Data Trans Move direct byte to Register
AC
172
2
2
MOV R4, direct
32
Data Trans Move direct byte to Register
AD
173
2
2
MOV R5, direct
32
Data Trans Move direct byte to Register
AE
174
2
2
MOV R6, direct
32
Data Trans Move direct byte to Register
AF
175
2
2
MOV R7, direct
32
Data Trans Move direct byte to Register
E5
229
2
2
MOV A, direct
32
Data Trans Move direct byte to A
E6
230
1
2
MOV A, @R0
32
Data Trans Move indirect RAM to A
E7
231
1
2
MOV A, @R1
32
Data Trans Move indirect RAM to A
E8
232
1
1
MOV A, R0
32
Data Trans Move Register to A
E9
233
1
1
MOV A, R1
32
Data Trans Move Register to A
EA
234
1
1
MOV A, R2
32
Data Trans Move Register to A
EB
235
1
1
MOV A, R3
32
Data Trans Move Register to A
EC
236
1
1
MOV A, R4
32
Data Trans Move Register to A
ED
237
1
1
MOV A, R5
32
Data Trans Move Register to A
EE
238
1
1
MOV A, R6
32
Data Trans Move Register to A
EF
239
1
1
MOV A, R7
32
Data Trans Move Register to A
F5
245
2
2
MOV direct, A
33
Data Trans Move A to direct byte
F6
246
1
2
MOV @R0, A
34
Data Trans Move A to indirect RAM
F7
247
1
2
MOV @R1, A
34
Data Trans Move A to indirect RAM
F8
248
1
1
MOV R0, A
32
Data Trans Move A to Register
F9
249
1
1
MOV R1, A
32
Data Trans Move A to Register
FA
250
1
1
MOV R2, A
32
Data Trans Move A to Register
FB
251
1
1
MOV R3, A
32
Data Trans Move A to Register
FC
252
1
1
MOV R4, A
32
Data Trans Move A to Register
FD
253
1
1
MOV R5, A
32
Data Trans Move A to Register
FE
254
1
1
MOV R6, A
32
Data Trans Move A to Register
FF
255
1
1
MOV R7, A
32
Data Trans Move A to Register
83
131
1
3
MOVC A, @A+PC
36
Data Trans Move code byte relative PC to A
93
147
1
3
MOVC A, @A+DPTR
36
Data Trans Move code byte relative DPTR to A
E0
224
1
3
MOVX A, @DPTR
37
Data Trans Move external RAM (16-bit address) to A
E2
226
1
3
MOVX A, @R0
37
Data Trans Move external RAM (8-bit address) to A
E3
227
1
3
MOVX A, @R1
37
Data Trans Move external RAM (8-bit address) to A
F0
240
1
3
MOVX @DPTR, A
38
Data Trans Move A to external RAM (16-bit address)
F2
242
1
3
MOVX @R0, A
38
Data Trans Move A to external RAM (8-bit address)
F3
243
1
3
MOVX @R1, A
38
Data Trans Move A to external RAM (8-bit address)
A4
164
1
4
MUL AB
38
Arithmetic Multiply A and B (both are unsigned, A = low order byte, B = high order byte)
00
0
1
1
NOP (none)
39
NOP No operation
42
66
2
2
ORL direct, A
40
Logical OR A to direct byte
43
67
3
3
ORL direct, #data
40
Logical OR immediate to direct byte
44
68
2
2
ORL A, #data
40
Logical OR immediate to A
45
69
2
2
ORL A, direct
40
Logical OR direct byte to A
46
70
1
2
ORL A, @R0
40
Logical OR indirect RAM to A
47
71
1
2
ORL A, @R1
40
Logical OR indirect RAM to A
48
72
1
1
ORL A, R0
39
Logical OR Register to A
49
73
1
1
ORL A, R1
39
Logical OR Register to A
72
114
2
2
ORL C, bit addr
41
Boolean OR direct bit to carry
4A
74
1
1
ORL A, R2
39
Logical OR Register to A
4B
75
1
1
ORL A, R3
39
Logical OR Register to A
4C
76
1
1
ORL A, R4
39
Logical OR Register to A
4D
77
1
1
ORL A, R5
39
Logical OR Register to A
4E
78
1
1
ORL A, R6
39
Logical OR Register to A
4F
79
1
1
ORL A, R7
39
Logical OR Register to A
A0
160
2
2
ORL C, /bit addr
41
Boolean OR complement of direct bit to Carry
D0
208
2
2
POP direct
41
Data Trans Pop direct byte from stack
C0
192
2
2
PUSH direct
42
Data Trans Push direct byte onto stack
22
34
1
6
RET (none)
42
Branching Return from subroutine
32
50
1
6
RETI (none)
43
Branching Return from interrupt, restores int logic to accept ints at same priority level as one just processed.
23
35
1
1
RL A
43
Logical Rotate A left (A = (A << 1), A0 = A7)
33
51
1
1
RLC A
44
Logical Rotate A left through Carry (A = (A << 1), A0 = C, C = A7)
03
3
1
1
RR A
44
Logical Rotate A right (A = (A >> 1), A7 = A0)
13
19
1
1
RRC A
44
Logical Rotate A right through Carry (A = (A >> 1), A7 = C, C = A0)
D2
210
2
2
SETB bit addr
45
Boolean Set direct bit
D3
211
1
1
SETB C
45
Boolean Set Carry
80
128
2
4
SJMP rel addr
45
Branching Short jump (relative address)
94
148
2
2
SUBB A, #data
46
Arithmetic Subtract immediate from A with borrow (A = A - byte - C)
95
149
2
2
SUBB A, direct
46
Arithmetic Subtract direct byte from A with borrow (A = A - byte - C)
96
150
1
2
SUBB A, @R0
46
Arithmetic Subtract indirect RAM from A with borrow (A = A - byte - C)
97
151
1
2
SUBB A, @R1
46
Arithmetic Subtract indirect RAM from A with borrow (A = A - byte - C)
98
152
1
1
SUBB A, R0
46
Arithmetic Subtract register from A with borrow (A = A - byte - C)
99
153
1
1
SUBB A, R1
46
Arithmetic Subtract register from A with borrow (A = A - byte - C)
9A
154
1
1
SUBB A, R2
46
Arithmetic Subtract register from A with borrow (A = A - byte - C)
9B
155
1
1
SUBB A, R3
46
Arithmetic Subtract register from A with borrow (A = A - byte - C)
9C
156
1
1
SUBB A, R4
46
Arithmetic Subtract register from A with borrow (A = A - byte - C)
9D
157
1
1
SUBB A, R5
46
Arithmetic Subtract register from A with borrow (A = A - byte - C)
9E
158
1
1
SUBB A, R6
46
Arithmetic Subtract register from A with borrow (A = A - byte - C)
9F
159
1
1
SUBB A, R7
46
Arithmetic Subtract register from A with borrow (A = A - byte - C)
C4
196
1
1
SWAP A
47
Logical Swap nibbles of A
C5
197
2
2
XCH A, direct
47
Logical Exchange direct byte with A
C6
198
1
2
XCH A, @R0
47
Logical Exchange indirect RAM with A
C7
199
1
2
XCH A, @R1
47
Logical Exchange indirect RAM with A
C8
200
1
1
XCH A, R0
47
Logical Exchange Register with A
C9
201
1
1
XCH A, R1
47
Logical Exchange Register with A
CA
202
1
1
XCH A, R2
47
Logical Exchange Register with A
CB
203
1
1
XCH A, R3
47
Logical Exchange Register with A
CC
204
1
1
XCH A, R4
47
Logical Exchange Register with A
CD
205
1
1
XCH A, R5
47
Logical Exchange Register with A
CE
206
1
1
XCH A, R6
47
Logical Exchange Register with A
CF
207
1
1
XCH A, R7
47
Logical Exchange Register with A
D6
214
1
2
XCHD A, @R0
48
Logical Exchange low nibbles of indirect RAM and A
D7
215
1
2
XCHD A, @R1
48
Logical Exchange low nibbles of indirect RAM and A
62
98
2
2
XRL direct, A
48
Logical Exclusive-OR A to direct byte
63
99
3
3
XRL direct, #data
48
Logical Exclusive-OR immediate to direct byte
64
100
2
2
XRL A, #data
48
Logical Exclusive-OR immediate to A
65
101
2
2
XRL A, direct
48
Logical Exclusive-OR direct byte to A
66
102
1
2
XRL A, @R0
48
Logical Exclusive-OR indirect RAM to A
67
103
1
2
XRL A, @R1
48
Logical Exclusive-OR indirect RAM to A
68
104
1
1
XRL A, R0
48
Logical Exclusive-OR Register to A
69
105
1
1
XRL A, R1
48
Logical Exclusive-OR Register to A
6A
106
1
1
XRL A, R2
48
Logical Exclusive-OR Register to A
6B
107
1
1
XRL A, R3
48
Logical Exclusive-OR Register to A
6C
108
1
1
XRL A, R4
48
Logical Exclusive-OR Register to A
6D
109
1
1
XRL A, R5
48
Logical Exclusive-OR Register to A
6E
110
1
1
XRL A, R6
48
Logical Exclusive-OR Register to A
6F
111
1
1
XRL A, R7
48
Logical Exclusive-OR Register to A